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AMD Zen 3 Architecture Design Completed: One Drag Four!

via:博客园     time:2019/9/26 8:01:10     readed:126

Author: Q above

It was not long before the 2nd and 3rd generation of Xiaolong and Ruilong with 7Nm technology and Zen 2 architecture were released that AMD officially confirmed that,Zen 3 architecture has been designed, corresponding to the next generation of Xiaolong processor code-named

With regard to the Zen 3 architecture, it can be said that there is little knowledge at the moment, but there is a lot of exposure from foreign media.Zen 3 is expected to support four-threading technology!

AMD Zen,Zen, Zen 2 architecture all support synchronous multithreading, similar to Intel hyperthreading technology, each physical core can provide two logical cores, and if Zen 3 architecture can bring four threads, then a physical core can be used as four logical cores, we will see 64 core 256 threads configuration.

It's just that I don't know if AMD will use the technology in consumer sharp dragons.

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Of course, AMD wasn't the first to do that,IBM Power processors have supported four or even eight threads for many years, which is one of the core reasons why IBM Power is so powerful.

Perhaps AMD was inspired by IBM?

Another interesting thing is that,On the contrary, Intel is weakening multi-thread technology.For example, nine generations of Core processor desktop version, with the exception of i9 and Core, i7/i5/i3/ Caiyang does not support multithreading, and Intel has never said why it should be done with the exception of product line division.

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There's a spring breeze on this side of AMD,

At the global technology conference GTC, Globalfoundries (Cell Core (GF) announced the launch of the 12LP process, an improved version of the 12nm LP process, with a 20% performance increase and a 40% reduction in power consumption.

GF, which was separated from AMD, suddenly abandoned 7nm and the following processes in August last year, focusing on 14/12nm and special processes, for which AMD also had to transfer the 7nm order completely to TSMC. On the other hand, the 14/12nm process will still be delivered to AMD, and the IO core of the current 7nm Ruilong and Xiaolong processors is GF.

Although not pursuing more sophisticated technology, GF will not stop technological upgrading.The 12LP process introduced this time was improved and optimized on the basis of 12nmLP(which was improved on the 14nm process). Compared with the latter, the performance was improved by 20%, the power consumption was reduced by 40%and the area was reduced by 15%.

One of the main characteristics of this process is that the voltage of SARM unit is as low as 0.5V, which supports the high speed and low power data transmission between processors and memory, which is an important requirement in computing and AI applications.

At the same time, GF also synchronously launched a design reference suite for AI applications and programs / technologies to jointly develop (DTCO) services, both of which can improve the design of AI circuits as a whole and achieve low power consumption and low cost development.

Another key function is 2.5D encapsulation, which helps integrate high-bandwidth memory HBM with processors for high-speed, low-power data transmission.

GF indicates that 12LP process can make full use of the physical IP and POP IP core of ARM in AI application, and these two IP schemes are also suitable for the original 12nm process.

For 12LP processes, GF officials say their 12LP solutions can provide customers with the performance and power benefits they want from the 7nm process, but the cost of NRE is only half that of the 7nm process, which can save a lot. In addition, the 12nm process is mature enough and the customer flow speed will be very fast, which will help to meet the growing AI market demand quickly.

According to GF, the PDK of the 12LP process is now available and is working with a number of customers, expected to mass production at the Fab 8 plant in New York in the second half of 2020.

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Let's talk about Intel.

According to the previously exposed roadmap, Intel will launch a second-generation 10nm process Tiger Lake processor next year after the launch of 10nm's Ice Lake processor this year, although it will still be used in the mobile market initially and will not be used in desktop processors until 2021.

For the Tiger Lake processor, it is known that it will use the second generation CPU microkernel Willow Cove, GPU changes are the largest, Gen12 core display will be upgraded to Xe architecture, said to be the largest change in Intel GPU architecture in 13 years, performance is four times the current core display.

In addition to the CPU, GPU big change, the 10nm process of TigerLake on the package may also be fully upgraded, recently in the ECE Eurasian Economic Union official website certification, people found that TigerLake-U42(meaning is 4 core GT2 core display) using MCP multi-chip packaging technology.

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In the past few years, MCP packaging technology has no unique significance. Glue multi-core technology was used more than 10 years ago, but now the situation is different. Intel has launched two more advanced 2D and 3D packaging technologies, EMIB and Foveros, which are different from simple glue multi-core technology.Instead, chips with different architectures and processes can be packaged together, and the technology content is too high.

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Considering that the Tiger Lake processor is a point in time for 2020 to 2021, the MCP encapsulation here should not be the traditional way to use EMIB or Foveros encapsulation anyway.

If that's true, it means that a previous guess has come true. It was rumored recently that Intel continued to use the 14-nm process on the Rocket Lake processor in 2021 with the aim of separating CPU and GPU units. The CPU part is the high-performance core of the 14-nm process, and the GPU can choose 14-nm Ge. The combination of N9 nuclear display or 10nm Xe nuclear display is much more flexible.

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