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Samsung's RISC-V instruction set architecture: first hand-off chip

via:快科技     time:2019/10/14 16:06:50     readed:81

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According to Cho Myung-hyun, the head of SemiFive, the chip usesSamsung14nm LPP process.

At present, the main rival of Samsung Wafer Factory, TSMC, has been introduced into RISC-V industry. The joining of the two powers will enrich RISC-V's ecology and develop more customers of Waferless pure design companies.

It is reported that the SemiFive is a subsidiary of the RISC-V giant SiFive in South Korea, and the latter has been obtained from Samsung,Qualcomm and other about 150 billion won investment, and maintain more than 250 ecological partners.

According to the data, RISC-V is a simplified instruction set architecture (ISA), originated from a new project at the University of California, Berkley in 2010. its architecture is simple, completely open source, and can be customized by extended instructions.

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